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<p>&#x4E3A;&#x4E86;&#x72B6;&#x6001;&#x7684;&#x4FDD;&#x5B58;&#x4E0E;&#x6062;&#x590D;&#xFF0C;&#x6211;&#x4EEC;&#x53EF;&#x4EE5;&#x5148;&#x7528;&#x6808;&#x4E0A;&#x7684;&#x4E00;&#x5C0F;&#x6BB5;&#x7A7A;&#x95F4;&#x6765;&#x628A;&#x9700;&#x8981;&#x4FDD;&#x5B58;&#x7684;&#x5168;&#x90E8;&#x901A;&#x7528;&#x5BC4;&#x5B58;&#x5668;&#x548C; CSR &#x5BC4;&#x5B58;&#x5668;&#x4FDD;&#x5B58;&#x5728;&#x6808;&#x4E0A;&#xFF0C;&#x4FDD;&#x5B58;&#x5B8C;&#x4E4B;&#x540E;&#x5728;&#x8DF3;&#x8F6C;&#x5230; Rust &#x7F16;&#x5199;&#x7684;&#x4E2D;&#x65AD;&#x5904;&#x7406;&#x51FD;&#x6570;&#xFF1B;&#x800C;&#x5BF9;&#x4E8E;&#x6062;&#x590D;&#xFF0C;&#x5219;&#x76F4;&#x63A5;&#x628A;&#x5907;&#x4EFD;&#x5728;&#x6808;&#x4E0A;&#x7684;&#x5185;&#x5BB9;&#x5199;&#x56DE;&#x5BC4;&#x5B58;&#x5668;&#x3002;&#x7531;&#x4E8E;&#x6D89;&#x53CA;&#x5230;&#x4E86;&#x5BC4;&#x5B58;&#x5668;&#x7EA7;&#x522B;&#x7684;&#x64CD;&#x4F5C;&#xFF0C;&#x6211;&#x4EEC;&#x9700;&#x8981;&#x7528;&#x6C47;&#x7F16;&#x6765;&#x5B9E;&#x73B0;&#x3002;</p>
<p>&#x800C;&#x5BF9;&#x4E8E;&#x5982;&#x4F55;&#x4FDD;&#x5B58;&#x5728;&#x6808;&#x4E0A;&#xFF0C;&#x6211;&#x4EEC;&#x53EF;&#x4EE5;&#x76F4;&#x63A5;&#x4EE4; <code>sp</code> &#x6808;&#x5BC4;&#x5B58;&#x5668;&#x76F4;&#x63A5;&#x51CF;&#x53BB;&#x76F8;&#x5E94;&#x9700;&#x8981;&#x5F00;&#x8F9F;&#x7684;&#x5927;&#x5C0F;&#xFF0C;&#x7136;&#x540E;&#x4F9D;&#x6B21;&#x653E;&#x5728;&#x6808;&#x4E0A;&#x3002;&#x9700;&#x8981;&#x6CE8;&#x610F;&#x7684;&#x662F;&#xFF0C;<code>sp</code> &#x5BC4;&#x5B58;&#x5668;&#x53C8;&#x540D; <code>x2</code>&#xFF0C;&#x6211;&#x4EEC;&#x9700;&#x8981;&#x4E0D;&#x65AD;&#x7528;&#x5230;&#x8FD9;&#x4E2A;&#x5BC4;&#x5B58;&#x5668;&#x544A;&#x8BC9; CPU &#x5176;&#x4ED6;&#x5BC4;&#x5B58;&#x5668;&#x653E;&#x5728;&#x54EA;&#x4E2A;&#x5730;&#x5740;&#xFF0C;&#x6240;&#x4EE5;&#x5904;&#x7406;&#x8FD9;&#x4E2A; <code>sp</code> &#x5BC4;&#x5B58;&#x5668;&#x672C;&#x8EAB;&#x7684;&#x4FDD;&#x5B58;&#x65F6;&#x4E5F;&#x9700;&#x8981;&#x683C;&#x5916;&#x5C0F;&#x5FC3;&#x3002;</p>
<h3 id="&#x7F16;&#x5199;&#x6C47;&#x7F16;">&#x7F16;&#x5199;&#x6C47;&#x7F16;</h3>
<p>&#x56E0;&#x4E3A;&#x6C47;&#x7F16;&#x4EE3;&#x7801;&#x8F83;&#x957F;&#xFF0C;&#x8FD9;&#x91CC;&#x6211;&#x4EEC;&#x65B0;&#x5EFA;&#x4E00;&#x4E2A; <code>os/src/interrupt/interrupt.asm</code> &#x6587;&#x4EF6;&#x6765;&#x7F16;&#x5199;&#x8FD9;&#x6BB5;&#x64CD;&#x4F5C;&#xFF1A;</p>
<p></p><p class="code-label">os/src/interrupt/interrupt.asm</p><p></p>
<pre><code class="lang-asm"># &#x6211;&#x4EEC;&#x5C06;&#x4F1A;&#x7528;&#x4E00;&#x4E2A;&#x5B8F;&#x6765;&#x7528;&#x5FAA;&#x73AF;&#x4FDD;&#x5B58;&#x5BC4;&#x5B58;&#x5668;&#x3002;&#x8FD9;&#x662F;&#x5FC5;&#x8981;&#x7684;&#x8BBE;&#x7F6E;
.altmacro
# &#x5BC4;&#x5B58;&#x5668;&#x5BBD;&#x5EA6;&#x5BF9;&#x5E94;&#x7684;&#x5B57;&#x8282;&#x6570;
.set    REG_SIZE, 8
# Context &#x7684;&#x5927;&#x5C0F;
.set    CONTEXT_SIZE, 34

# &#x5B8F;&#xFF1A;&#x5C06;&#x5BC4;&#x5B58;&#x5668;&#x5B58;&#x5230;&#x6808;&#x4E0A;
.macro SAVE reg, offset
    sd  \reg, \offset*8(sp)
.endm

.macro SAVE_N n
    SAVE  x\n, \n
.endm


# &#x5B8F;&#xFF1A;&#x5C06;&#x5BC4;&#x5B58;&#x5668;&#x4ECE;&#x6808;&#x4E2D;&#x53D6;&#x51FA;
.macro LOAD reg, offset
    ld  \reg, \offset*8(sp)
.endm

.macro LOAD_N n
    LOAD  x\n, \n
.endm

    .section .text
    .globl __interrupt
# &#x8FDB;&#x5165;&#x4E2D;&#x65AD;
# &#x4FDD;&#x5B58; Context &#x5E76;&#x4E14;&#x8FDB;&#x5165; Rust &#x4E2D;&#x7684;&#x4E2D;&#x65AD;&#x5904;&#x7406;&#x51FD;&#x6570; interrupt::handler::handle_interrupt()
__interrupt:
    # &#x5728;&#x6808;&#x4E0A;&#x5F00;&#x8F9F; Context &#x6240;&#x9700;&#x7684;&#x7A7A;&#x95F4;
    addi    sp, sp, -34*8

    # &#x4FDD;&#x5B58;&#x901A;&#x7528;&#x5BC4;&#x5B58;&#x5668;&#xFF0C;&#x9664;&#x4E86; x0&#xFF08;&#x56FA;&#x5B9A;&#x4E3A; 0&#xFF09;
    SAVE    x1, 1
    # &#x5C06;&#x539F;&#x6765;&#x7684; sp&#xFF08;sp &#x53C8;&#x540D; x2&#xFF09;&#x5199;&#x5165; 2 &#x4F4D;&#x7F6E;
    addi    x1, sp, 34*8
    SAVE    x1, 2
    # &#x4FDD;&#x5B58; x3 &#x81F3; x31
    .set    n, 3
    .rept   29
        SAVE_N  %n
        .set    n, n + 1
    .endr

    # &#x53D6;&#x51FA; CSR &#x5E76;&#x4FDD;&#x5B58;
    csrr    s1, sstatus
    csrr    s2, sepc
    SAVE    s1, 32
    SAVE    s2, 33

    # &#x8C03;&#x7528; handle_interrupt&#xFF0C;&#x4F20;&#x5165;&#x53C2;&#x6570;
    # context: &amp;mut Context
    mv      a0, sp
    # scause: Scause
    csrr    a1, scause
    # stval: usize
    csrr    a2, stval
    jal  handle_interrupt

    .globl __restore
# &#x79BB;&#x5F00;&#x4E2D;&#x65AD;
# &#x4ECE; Context &#x4E2D;&#x6062;&#x590D;&#x6240;&#x6709;&#x5BC4;&#x5B58;&#x5668;&#xFF0C;&#x5E76;&#x8DF3;&#x8F6C;&#x81F3; Context &#x4E2D; sepc &#x7684;&#x4F4D;&#x7F6E;
__restore:
    # &#x6062;&#x590D; CSR
    LOAD    s1, 32
    LOAD    s2, 33
    csrw    sstatus, s1
    csrw    sepc, s2

    # &#x6062;&#x590D;&#x901A;&#x7528;&#x5BC4;&#x5B58;&#x5668;
    LOAD    x1, 1
    # &#x6062;&#x590D; x3 &#x81F3; x31
    .set    n, 3
    .rept   29
        LOAD_N  %n
        .set    n, n + 1
    .endr

    # &#x6062;&#x590D; sp&#xFF08;&#x53C8;&#x540D; x2&#xFF09;&#x8FD9;&#x91CC;&#x6700;&#x540E;&#x6062;&#x590D;&#x662F;&#x4E3A;&#x4E86;&#x4E0A;&#x9762;&#x53EF;&#x4EE5;&#x6B63;&#x5E38;&#x4F7F;&#x7528; LOAD &#x5B8F;
    LOAD    x2, 2
    sret
</code></pre>
<p>&#x8FD9;&#x6837;&#x7684;&#x8BDD;&#x6211;&#x4EEC;&#x5C31;&#x5B8C;&#x6210;&#x4E86;&#x5BF9;&#x5F53;&#x524D;&#x6267;&#x884C;&#x73B0;&#x573A;&#x4FDD;&#x5B58;&#xFF0C;&#x6211;&#x4EEC;&#x628A; <code>Context</code> &#x4EE5;&#x53CA; <code>scause</code> &#x548C; <code>stval</code> &#x4F5C;&#x4E3A;&#x53C2;&#x6570;&#x4F20;&#x5165;&#x4E86; <code>handle_interrupt</code> &#x51FD;&#x6570;&#x4E2D;&#xFF0C;&#x8FD9;&#x662F;&#x4E00;&#x4E2A; Rust &#x7F16;&#x5199;&#x7684;&#x51FD;&#x6570;&#xFF0C;&#x540E;&#x9762;&#x6211;&#x4EEC;&#x5C06;&#x4F1A;&#x5B9E;&#x73B0;&#x5B83;&#x3002;</p>
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